ADSP-BF526BBCZ-4AX 查看數據表（PDF） - Analog Devices

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ADSP-BF526BBCZ-4AX

Blackfin® Embedded Processor

Analog Devices 

Preliminary Technical Data

ADSP-BF522/523/524/525/526/527

PPI_CLK

POLC = 0

PPI_CLK

POLC = 1

POLS = 1

PPI_FS1

POLS = 0

POLS = 1

PPI_FS2

POLS = 0

PPI_DATA

POLC = 0

PPI_CLK

PPI_CLK

POLC = 1

POLS = 1

PPI_FS1

POLS = 0

POLS = 1

PPI_FS2

POLS = 0

PPI_DATA

DATA

DRIVING/

FRAME

SYNC

SAMPLING

EDGE

DATA

DRIVING/

FRAME

SYNC

SAMPLING

EDGE

tSFSPE

tHFSPE

tHDTPE

tDDTPE

Figure 20. PPI GP Tx Mode with External Frame Sync Timing

FRAME

SYNC IS

DRIVEN

OUT

DATA0

IS

SAMPLED

tDFSPE

tHOFSPE

tSDRPE

tHDRPE

Figure 21. PPI GP Rx Mode with Internal Frame Sync Timing

Rev. PrG | Page 47 of 80 | February 2009

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