CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

Throughput

Throughput is the number of cycles between the start of an instruction and the start of a succeeding

instruction of the same type, both instructions occurring in a long sequence of instructions of the same

type; repeated use of the same register may only occur in a sequence of length greater than or equal to 8.

Latency

Latency is the number of cycles between the start of instruction execution and its completion. The number

of cycles taken by a sequence of floating point instructions, each depends on the result of the preceding

instruction in the sequence, can generally be found by adding the latencies of the individual instructions.

There can be minor discrepancies from this rule for particular sequences.

The exact definition is dependent on the type of instruction being executed:

Arithmetic instructions

From register read to register write.

LDF, LFM, FLT

From start of instruction arbitration to register write.

STF, SFM, CMF, FIX

From register read to start of next instruction

arbitration.

WFS, WFC

From start of instruction arbitration until the next

instruction would be deemed to start by these rules.

RFS, RFC

From the time that the previous instruction would be

deemed to end by these rules to the start of the next

instruction arbitration.

NOTE: Speculative execution, concurrent execution between arithmetic and load/store instructions and concurrent

execution between ARM integer instruction and FPA instructions can significantly reduce the effective tim-

ings shown.

19.6.1 Instruction Classification

Instructions can be classified into arithmetic, load/store, and joint instructions:

Arithmetic

Those instructions that execute completely within the arithmetic unit.

These include all the hardware-implemented coprocessor data

operations (see Section 19.2).

Load/store

Those instructions that execute completely within the load/store unit.

These include LDF, STF, LFM and SFM.

Joint Arithmetic and Load/Store Instructions

FIX, CMF,CNF,CMFE,CNFE

FLT

WFS,RFS,WFC,RFC

Arithmetic followed by load/store.

Load/store followed by arithmetic.

Occupy both arithmetic and load/store units, since the

arithmetic unit must be empty before any of these

instructions may be executed.

184

FLOATING-POINT INSTRUCTION SET

ADVANCE DATA BOOK v2.0

June 1997

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