CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

19.6.2 Performance Tuning

The FPA is capable of executing load/store and arithmetic instructions concurrently and is also capable

of executing instructions speculatively (that is, before they have been committed to execution by the ARM

CPU). Both of these features can be exploited to maximize the performance of the FPA. The code frag-

ment shown below is an example of how to achieve this:

1 SFM F0,4,[R0],#48

2 DVFS F0,F1,#3

3 SFM F4,4,[R0],#48

4 MOV R1,R2

5 MOV R3,R4

CPCLK

CPD[31:0]

Store_issue

Store_accepted

AU_issue

Prepare

Calculate

Align

Round

123

A

B

45

C

Figure 19-1. Performance Tuning

June 1997

ADVANCE DATA BOOK v2.0

FLOATING-POINT INSTRUCTION SET

185

Share Link: