E
28F160S5, 28F320S5
Start
Write 60H
Write D0H
Read Status
Register
0
SR.7 =
1
Full Status
Check if Desired
Clear Block Lock-Bits
Complete
Bus
Operation
Write
Write
Command
Comments
Clear Block
Data = 60H
Lock-Bits Setup Addr = X
Clear Block
Data = D0H
Lock-Bits Confirm Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Write FFH after the Clear Block Lock-Bits operation to place device
to read array mode.
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
SR.3 =
1
Voltage Range Error
0
1
SR.1=
Device Protect Error
0
1
SR.4,5 =
0
Command Sequence
Error
1
SR.5 =
0
Clear Block Lock-Bits
Successful
Clear Block Lock-Bits
Error
Bus
Operation
Standby
Standby
Standby
Command
Comments
Check SR.3
1 = Programming Voltage Error
Detect
Check SR.1
1 = Device Protect Detect
RST# = VIH, Master Lock-Bit Is Set
Check SR.4,5
Both 1 = Command Sequence Error
Standby
Check SR.5
1 = Clear Block Lock-Bits Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear Status
Register command.
If error is detected, clear the Status Register before attempting
retry or other error recovery.
Figure 12. Clear Block Lock-Bits Flowchart
ADVANCE INFORMATION
37