ADP3208CJCPZ-RL View Datasheet(PDF) - ON Semiconductor
Part Name
Description
Manufacturer
ADP3208CJCPZ-RL
ON Semiconductor
ADP3208CJCPZ-RL Datasheet PDF : 41 Pages
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ADP3208C
VOLTAGE ERROR
AMPLIFIER
REFERENCE
VOLTAGE
COMP
FB ADP3208C
RA
CA
CFB
OUTPUT
VOLTAGE
CB
RFB
Figure 37. Voltage Error Amplifier
GAIN
–20dB/DEC
–20dB/DEC
0dB
fP1
fZ2 fZ1 fP2
FREQUENCY
Figure 38. Poles and Zeros of Voltage Error Amplifier
The following equations give the locations of the poles and
zeros shown in Figure 38:
f Z1
=
1
2π × C A
×RA
(20)
f Z2
=
1
2π ×CFB
× RFB
(21)
f P1
=
2π(C A
1
+CB
)× RFB
(22)
f P2
=
CA +CB
2π× RA ×CB ×CA
(23)
The expressions that follow compute the time constants for
the poles and zeros in the system and are intended to yield an
optimal starting point for the design; some adjustments may be
necessary to account for PCB and component parasitic effects
(see the Tuning Procedure for ADP3208C section):
RE
= n× RO
+ AD × RDS
+
RL ×VRT
VVID
+
(24)
2× L ×(1 − (n× D))×VRT
n × C X × RO ×VVID
( ) TA
= CX
×
RO
− R'
+
LX
RO
× RO − R'
RX
(25)
TB = (RX + R'−RO )×C X
(26)
TC
=
VRT
× ⎜⎜⎝⎛ L
−
AD × RDS
2 × fSW
VVID × RE
⎟⎟⎠⎞
(27)
( ) TD
=
CX
CX ×CZ
× RO − R'
× RO2
+CZ
× RO
(28)
where:
R' is the PCB resistance from the bulk capacitors to the ceramics
and is approximately 0.4 mΩ (assuming an 8-layer motherboard).
RDS is the total low-side MOSFET for on resistance per phase.
AD is 5.
VRT is 1.25 V.
LX is 150 pH for the six Panasonic SP capacitors.
The compensation values can be calculated as follows:
CA
=
n× RO ×TA
RE ×RB
(29)
RA
=
TC
CA
(30)
CB
=
TB
RB
(31)
C FB
=
TD
RA
(32)
The standard values for these components are subject to the
tuning procedure described in the Tuning Procedure for
ADP3208C section.
CIN Selection and Input Current
DI/DT Reduction
In continuous inductor-current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to n × VOUT/VIN and an amplitude that is one-nth of
the maximum output current. To prevent large voltage
transients, use a low ESR input capacitor sized for the
maximum rms current. The maximum rms capacitor current
occurs at the lowest input voltage and is given by
ICRMS = D × IO ×
1 −1
n×D
(33)
I CRMS = 0.18 × 40 A ×
1 −1 = 9.6 A
2 × 0.18
where IO is the output current.
In a typical notebook system, the battery rail decoupling is
achieved by using MLC capacitors or a mixture of MLC
capacitors and bulk capacitors. In this example, the input
Rev. 1 | Page 37 of 41 | www.onsemi.com
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