PIC16LF870-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LF870-I/SO Datasheet PDF : 156 Pages
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PIC16F870/871
FIGURE 14-11: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
Pin
RC7/RX/DT
Pin
121
121
120
122
Note: Refer to Figure 14-3 for load conditions.
TABLE 14-7: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param Sym
No.
Characteristic
Min Typ† Max Units Conditions
120 TckH2dtV SYNC XMIT (MASTER &
SLAVE)
Clock high to data out valid
Standard(F)
Extended(LF)
—
— 80 ns
—
— 100 ns
121 Tckrf
Clock out rise time and fall time Standard(F)
(Master Mode)
Extended(LF)
—
— 45 ns
—
— 50 ns
122 Tdtrf
Data out rise time and fall time Standard(F)
—
— 45 ns
Extended(LF)
—
— 50 ns
†: Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 14-12: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 14-3 for load conditions.
TABLE 14-8: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min Typ† Max Units Conditions
125
TdtV2ckL SYNC RCV (MASTER & SLAVE)
Data setup before CK ↓ (DT setup time)
15
—
—
ns
126
TckL2dtl Data hold after CK ↓ (DT hold time)
15
—
—
ns
†: Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
DS30569A-page 132
Preliminary
© 1999 Microchip Technology Inc.
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