PIC16F870/871
TABLE 14-9: PIC16F870/871 (INDUSTRIAL)
PIC16LF870/871 (INDUSTRIAL)
Param Sym Characteristic
No.
A01 NR Resolution
A03 EIL Integral linearity error
A04 EDL Differential linearity error
A06 EOFF Offset error
A07 EGN Gain error
A10 — Monotonicity(3)
A20 VREF Reference voltage (VREF+ - VREF-)
A21 VREF+ Reference voltage High
A22 VREF- Reference voltage low
A25 VAIN Analog input voltage
A30 ZAIN Recommended impedance of
analog voltage source
A40 IAD A/D conversion cur- Standard(F)
rent (VDD)
Extended(LF)
A50 IREF VREF input current (Note 2)
Min
Typ†
Max
Units
Conditions
—
—
10-bits
bit VREF = VDD = 5.12V,
VSS ≤ VAIN ≤ VREF
—
—
<±1
LSb VREF = VDD = 5.12V,
VSS ≤ VAIN ≤ VREF
—
—
<±1
LSb VREF = VDD = 5.12V,
VSS ≤ VAIN ≤ VREF
—
—
<±1
LSb VREF = VDD = 5.12V,
VSS ≤ VAIN ≤ VREF
—
—
<±1
LSb VREF = VDD = 5.12V,
VSS ≤ VAIN ≤ VREF
—
guaranteed
—
— VSS ≤ VAIN ≤ VREF
2.0V
VDD - 2.5V
VSS - 0.3V
VSS - 0.3
—
—
VDD + 0.3 V Absolute minimum electrical
spec. to ensure 10-bit
accuracy.
VDD + 0.3V V Must meet spec. A20
VREF+ - 2.0V V Must meet spec. A20
—
VREF + 0.3 V
—
10.0
kΩ
—
220
—
µA Average current consump-
—
90
—
µA tion when A/D is on.
(Note 1)
10
—
1000
µA During VAIN acquisition.
Based on differential of
VHOLD to VAIN to charge
CHOLD, see Section 10.1.
—
—
10
µA During A/D Conversion cycle
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: When A/D is off, it will not consume any current other than minor leakage current.
The power-down current spec includes any such leakage from the A/D module.
2: VREF current is from RA3 pin or VDD pin, whichever is selected as reference input.
3: The A/D conversion result never decreases with an increase in the Input Voltage, and has no missing codes.
© 1999 Microchip Technology Inc.
Preliminary
DS30569A-page 133