ADE7880ACPZ-RL(RevA) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADE7880ACPZ-RL
(Rev.:RevA)

Polyphase Multifunction Energy Metering IC with Harmonic Monitoring

Analog Devices 

Data Sheet

ADE7880

REGISTERS LIST

Table 30. Registers Located in DSP Data Memory RAM

Register

Address Name

Bit

Bit Length During

R/W1 Length Communication2

0x4380 AIGAIN

R/W 24

32 ZPSE

0x4381 AVGAIN

R/W 24

32 ZPSE

0x4382 BIGAIN

R/W 24

32 ZPSE

0x4383 BVGAIN

R/W 24

32 ZPSE

0x4384 CIGAIN

R/W 24

32 ZPSE

0x4385 CVGAIN

R/W 24

32 ZPSE

0x4386 NIGAIN

R/W 24

32 ZPSE

0x4387 Reserved R/W 24

32 ZPSE

0x4388 DICOEFF

R/W 24

32 ZPSE

0x4389 APGAIN

R/W 24

0x438A AWATTOS R/W 24

0x438B BPGAIN

R/W 24

0x438C BWATTOS R/W 24

0x438D CPGAIN

R/W 24

0x438E CWATTOS R/W 24

0x438F AIRMSOS R/W 24

0x4390 AVRMSOS R/W 24

0x4391 BIRMSOS R/W 24

0x4392 BVRMSOS R/W 24

0x4393 CIRMSOS R/W 24

0x4394 CVRMSOS R/W 24

0x4395 NIRMSOS R/W 24

0x4396- Reserved

0x4397

N/A N/A

0x4398 HPGAIN

R/W 24

0x4399 ISUMLVL R/W 24

0x439A-

0x439E

0x439F

Reserved

VLEVEL

N/A N/A

R/W 24

0x43A0- Reserved

0x43A1

N/A N/A

0x43A2 AFWATTOS R/W 24

0x43A3 BFWATTOS R/W 24

0x43A4 CFWATTOS R/W 24

0x43A5 AFVAROS R/W 24

0x43A6 BFVAROS R/W 24

0x43A7 CFVAROS R/W 24

0x43A8 AFIRMSOS R/W 24

0x43A9 BFIRMSOS R/W 24

0x43AA CFIRMSOS R/W 24

0x43AB AFVRMSOS R/W 24

0x43AC BFVRMSOS R/W 24

0x43AD CFVRMSOS R/W 24

0x43AE HXWATTOS R/W 24

0x43AF HYWATTOS R/W 24

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

N/A

32 ZPSE

32 ZPSE

N/A

32 ZPSE

N/A

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

32 ZPSE

Type 3

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

S

N/A

S

S

N/A

S

N/A

S

S

S

S

S

S

S

S

S

S

S

S

S

S

Default Value

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x0000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

0x000000

Description

Phase A current gain adjust.

Phase A voltage gain adjust.

Phase B current gain adjust.

Phase B voltage gain adjust.

Phase C current gain adjust.

Phase C voltage gain adjust.

Neutral current gain adjust.

This location should not be written for proper

operation.

Register used in the digital integrator algorithm.

If the integrator is turned on, it must be set at

0xFF8000. In practice, it is transmitted as

0xFFF8000.

Phase A power gain adjust.

Phase A total active power offset adjust.

Phase B power gain adjust.

Phase B total active power offset adjust.

Phase C power gain adjust.

Phase C total active power offset adjust.

Phase A current rms offset.

Phase A voltage rms offset.

Phase B current rms offset.

Phase B voltage rms offset.

Phase C current rms offset.

Phase C voltage rms offset.

Neutral current rms offset.

These memory locations should not be written for

proper operation.

Harmonic powers gain adjust.

Threshold used in comparison between the sum

of phase currents and the neutral current.

These memory locations should not be written for

proper operation.

Register used in the algorithm that computes the

fundamental active and reactive powers.

These memory locations should not be written for

proper operation.

Phase A fundamental active power offset adjust.

Phase B fundamental active power offset adjust.

Phase C fundamental active power offset adjust.

Phase A fundamental reactive power offset adjust.

Phase B fundamental reactive power offset adjust.

Phase C fundamental reactive power offset adjust.

Phase A fundamental current rms offset.

Phase B fundamental current rms offset.

Phase C fundamental current rms offset.

Phase A fundamental voltage rms offset.

Phase B fundamental voltage rms offset.

Phase C fundamental voltage rms offset.

Active power offset adjust on harmonic X

(see Harmonics Calculations section for details).

Aactive power offset adjust on harmonic Y

(see Harmonics Calculations section for details).

Rev. A | Page 83 of 104

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