ADE7880ACPZ-RL(RevA) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADE7880ACPZ-RL
(Rev.:RevA)
(Rev.:RevA)
Analog Devices
ADE7880ACPZ-RL Datasheet PDF : 104 Pages
| |||
ADE7880
Address
Register Name
Bit
R/W1 Length
Bit Length
During
Communication2
Default
Type3 Value4
0xE898
0xE899
0xE89A
0xE89B
0xE89C
0xE89D
0xE89E
HZVRMS
HZIRMS
HZWATT
HZVAR
HZVA
HZPF
HZVHD
R
24
R
24
R
24
R
24
R
24
R
24
R
24
0xE89F HZIHD
R
24
0xE8A0 to Reserved
0xE8FF
0xE900 HCONFIG
0xE902
0xE903
0xE904
0xE905
0xE906
0xE907
0xE908
APF
BPF
CPF
APERIOD
BPERIOD
CPERIOD
APNOLOAD
0xE909 VARNOLOAD
0xE90A VANOLOAD
0xE9FE LAST_ADD
24
R/W 16
R
16
R
16
R
16
R
16
R
16
R
16
R/W 16
R/W 16
R/W 16
R
16
0xE9FF LAST_RWDATA16 R
16
0xEA00
0xEA01
CONFIG3
LAST_OP
R/W 8
R
8
0xEA02 WTHR
R/W 8
0xEA03 VARTHR
R/W 8
0xEA04 VATHR
R/W 8
0xEA05 to Reserved
0xEA07
0xEA08 HX
8
R/W 8
0xEA09 HY
R/W 8
0xEA0A HZ
R/W 8
32
S
N/A
32
S
N/A
32
S
N/A
32
S
N/A
32
S
N/A
32
S
N/A
32
S
N/A
32
S
N/A
32
16
U
0x08
16
U
N/A
16
U
N/A
16
U
N/A
16
U
N/A
16
U
N/A
16
U
N/A
16
U
0x0000
16
U
0x0000
16
U
0x0000
16
U
N/A
16
U
N/A
8
U
0x01
8
U
N/A
8
U
0x03
8
U
0x03
8
U
0x03
8
8
U
3
8
U
5
8
U
7
Rev. A | Page 88 of 104
Data Sheet
Description
current harmonic Y relative to the
fundamental.
The rms value of the phase voltage
harmonic Z.
The rms value of the phase current
harmonic Z.
The active power of the harmonic Z.
The reactive power of the harmonic Z.
The apparent power of the harmonic Z.
The power factor of the harmonic Z.
Harmonic distortion of the phase
voltage harmonic Z relative to the
fundamental.
Harmonic distortion of the phase
current harmonic Z relative to the
fundamental.
Reserved. These registers are always 0.
Harmonic Calculations Configuration
register. See Table 54.
Phase A power factor.
Phase B power factor.
Phase C power factor.
Line period on Phase A voltage.
Line period on Phase B voltage.
Line period on Phase C voltage.
No load threshold in the total/
fundamental active power data paths.
No load threshold in the total/
fundamental reactive power data path.
No load threshold in the apparent
power data path.
The address of the register successfully
accessed during the last read/write
operation.
Contains the data from the last successful
16-bit register communication.
Configuration register. See Table 53.
Indicates the type, read or write, of the
last successful read/write operation.
Threshold used in phase total/
fundamental active power data path.
Threshold used in phase total/
fundamental reactive power data path.
Threshold used in phase apparent
power data path.
Reserved. These registers are always 0.
Selects an index of the harmonic
monitored by the harmonic
computations.
Selects an index of the harmonic
monitored by the harmonic
computations.
Selects an index of the harmonic
monitored by the harmonic
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