ADSP-BF516KSWZ-3(RevD) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-BF516KSWZ-3
(Rev.:RevD)

Blackfin Embedded Processor

Analog Devices 

ADSP-BF512/BF514/BF514F16/BF516/BF518/BF518F16

Asynchronous Memory Read Cycle Timing

Table 26. Asynchronous Memory Read Cycle Timing

Parameter

Timing Requirements

tSDAT

DATA15–0 Setup Before CLKOUT

tHDAT

DATA15–0 Hold After CLKOUT

tSARDY

ARDY Setup Before CLKOUT

tHARDY

ARDY Hold After CLKOUT

Switching Characteristics

tDO

Output Delay After CLKOUT1

tHO

Output Hold After CLKOUT 1

1 Output pins/balls include AMS3–0, ABE1–0, ADDR19–1, AOE, ARE.

VDDMEM

1.8V Nominal

Min

Max

2.1

1.2

4

0.2

6

0.8

VDDMEM

2.5 V/3.3V Nominal

Min

Max

Unit

2.1

ns

0.8

ns

4

ns

0.2

ns

6

ns

0.8

ns

CLKOUT

AMSx

ABE1–0

ADDR19–1

AOE

ARE

ARDY

DATA 15–0

SETUP

2 CYCLES

tDO

PROGRAMMED READ

ACCESS 4 CYCLES

ACCESS EXTENDED

HOLD

3 CYCLES

1 CYCLE

tHO

tDO

tSARDY

tHO

tHARDY

tSARDY

tHARDY

tSDAT

tHDAT

Figure 11. Asynchronous Memory Read Cycle Timing

Rev. D | Page 31 of 68 | April 2014

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