ADSP-BF516KSWZ-3(RevD) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-BF516KSWZ-3
(Rev.:RevD)

Blackfin Embedded Processor

Analog Devices 

ADSP-BF512/BF514/BF514F16/BF516/BF518/BF518F16

External DMA Request Timing

Table 29 and Figure 14 describe the External DMA Request

operations.

Table 29. External DMA Request Timing1

VDDMEM/VDDEXT

1.8 V Nominal

VDDMEM/VDDEXT

2.5 V/3.3 V Nominal

Parameter

Min

Max

Min

Max

Unit

Timing Requirements

tDS

DMARx Asserted to CLKOUT High Setup

9

7.2

ns

tDH

CLKOUT High to DMARx Deasserted Hold Time

0

0

ns

tDMARACT

DMARx Active Pulse Width

tSCLK + 1

tSCLK + 1

ns

tDMARINACT DMARx Inactive Pulse Width

1.75 × tSCLK

1.75 × tSCLK

ns

1 Because the external DMA control pins are part of the VDDEXT power domain and the CLKOUT signal is part of the VDDMEM power domain, systems in which VDDEXT and

VDDMEM are NOT equal may require level shifting logic for correct operation.

CLKOUT

DMAR0/1

(ACTIVE LOW)

DMAR0/1

(ACTIVE HIGH)

tDS

tDH

tDMARACT

tDMARINACT

Figure 14. External DMA Request Timing

Rev. D | Page 34 of 68 | April 2014

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