CS495303(2008) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CS495303
(Rev.:2008)

32-bit Audio Decoder DSP Family with Dual DSP Engine Technology

Cirrus Logic 

CS4953xx Data Sheet

32-bit Audio Decoder DSP Family

5.12 Switching Characteristics — Serial Control Port - I2C Slave Mode

Parameter

Symbol Min

Typical

Max

Units

SCP_CLK frequency1

SCP_CLK low time

SCP_CLK high time

SCP_SCK rising to SCP_SDA rising or falling for START or

STOP condition

fiicck

tiicckl

tiicckh

tiicckcmd

-

1.25

1.25

1.25

400

kHz

-

µs

-

µs

µs

START condition to SCP_CLK falling

tiicstscl 1.25

-

µs

SCP_CLK falling to STOP condition

tiicstp

2.5

-

µs

Bus free time between STOP and START conditions

tiicbft

3

-

µs

Setup time SCP_SDA input valid to SCP_CLK rising

tiicsu

100

ns

Hold time SCP_SDA input after SCP_CLK falling

SCP_CLK low to SCP_SDA out valid

SCP_CLK falling to SCP_IRQ# rising

NAK condition to SCP_IRQ# low

Y SCP_CLK rising to SCB_BSY# low

tiich

tiicdov

tiicirqh

tiicirql

tiicbsyl

20

-

ns

-

18

ns

-

3*DCLKP + 40 ns

3*DCLKP + 20

ns

- 3*DCLKP + 20

ns

1. The specification fiicck indicates the maximum speed of the hardware. The system designer should be aware that

the actual maximum speed of the communication port may be limited by the firmware application. Flow control

using the SCP_BSY# pin should be implemented to prevent overflow of the input data buffer.

AR tiicckcmd

tiicckl

tiicr

tiicf

IN SCP_CLK

01

6

7

8

01

6

tiicstscl

tiicckh

tiicdov

fiicck

SCP_SDA

IM SCP_IRQ#

A6

tiicsu

tiich

A0 R/W ACK MSB

tiicirqh

L SCP_BSY#

tiicckcmd

7

8

tiicstp

LSB

ACK

tiicirql

tiicbft

tiiccbsyl

PREFigure 5. Serial Control Port - I2C Slave Mode Timing

16

Copyright 2008 Cirrus Logic

DS705PP3

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