QL5732 Enhanced QuickPCI Device Data Sheet Rev. E
DC Characteristics
Symbol
II
IOZ
CI
IOS
ICC
ICCIO
ICCIO(DIF)
IREF
IPD
Table 9: DC Characteristics
Parameter
Conditions
Temperature
Min
Max
I or I/O Input Leakage Current
3-State Output Leakage Current
Input Capacitance a
VI = VCCIO or GND
VI = VCCIO or GND
-
-10 µA
-10 µA
-
10 µA
10 µA
8 pF
Output Short Circuit Current b
Quiescent Current
Quiescent Current on VCCIO
Quiescent Current on VCCIO
for Differential I/O
Vo = GND
Vo = VCC
-15 mA
40 mA
VI,Vo = VCCIO or GND 0.50 mA(typ)
-
0 mA
-180 mA
210 mA
2 mA
2 mA
-
-
-
Quiescent Current on VREF
Pad Pull-down (programmable)
-
VCCIO = 3.6 V
-10 µA
-
10 µA
150 µA
a. Capacitance is sample tested only. Clock pins are 12 pF maximum.
b. Only one output at a time. Duration should not exceed 30 seconds.
Table 10: DC Input and Output Levels
INREF
LVTTL
VMIN VMAX VMIN
n/a n/a -0.3
LVCMOS
2
n/a
n/a -0.3
VIL
VMAX
0.8
0.7
VMIN
2.0
1.7
VIH
VMAX
VCCIO + 0.3
VCCIO + 0.3
GTL+
PCI
SSTL2
0.88
n/a
1.15
1.12
n/a
1.35
-0.3 INREF - 0.2 INREF + 0.2
-0.3 0.3 x VCCIO 0.5 x VCCIO
-0.3
INREF -
0.18
INREF + 0.18
VCCIO + 0.3
VCCIO + 0.5
VCCIO + 0.3
SSTL3 1.3 1.7 -0.3 INREF - 0.2 INREF + 0.2 VCCIO + 0.3
VOL
VMAX
0.4
VOH
VMIN
2.4
IOL IOH
mA mA
2.0 -2.0
0.7
1.7
2.0 -2.0
0.6
n/a
40 n/a
0.1 x VCCIO 0.9 x VCCIO 1.5 -0.5
0.74
1.76 7.6 -7.6
1.10
1.90
8 -8
NOTE: The data provided in Table 10 are JEDEC and PCI Specifications—QuickLogic
devices either meet or exceed these requirements.
NOTE: All CLK and IOCTRL pins are clamped to the Vcc rail, not the Vccio. Therefore,
these pins can only be driven up to Vcc + 0.3 V.
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