DSPIC30F1013AT-30E/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC30F1013AT-30E/ML

High-Performance, 16-Bit Digital Signal Controllers

Microchip Technology 

dsPIC30F3014/4013

7.3 Input Change Notification Module

The input change notification module provides the

dsPIC30F devices the ability to generate interrupt

requests to the processor, in response to a change of

state on selected input pins. This module is capable of

detecting input change of states even in Sleep mode,

when the clocks are disabled. There are up to 24 exter-

nal signals (CN0 through CN23) that may be selected

(enabled) for generating an interrupt request on a

change of state.

TABLE 7-2: INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F3014 (BITS 15-8)

SFR Name Addr. Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Reset State

CNEN1

CNEN2

CNPU1

CNPU2

Legend:

1:

00C0 CN15IE CN14IE CN13IE CN12IE CN11IE CN10IE CN9IE CN8IE

00C2

—

—

—

—

—

—

—

—

00C4 CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE CN8PUE

00C6

—

—

—

—

—

—

—

—

u = uninitialized bit

Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

0000 0000 0000 0000

0000 0000 0000 0000

0000 0000 0000 0000

0000 0000 0000 0000

TABLE 7-3: INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F3014 (BITS 7-0)

SFR

Name

Addr.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset State

CNEN1

CNEN2

CNPU1

CNPU2

Legend:

1:

00C0 CN7IE

CN6IE

CN5IE

CN4IE

CN3IE

CN2IE

CN1IE

CN0IE 0000 0000 0000 0000

00C2

—

—

—

—

—

CN18IE CN17IE CN16IE 0000 0000 0000 0000

00C4 CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE 0000 0000 0000 0000

00C6

—

—

—

—

—

CN18PUE CN17PUE CN16PUE 0000 0000 0000 0000

u = uninitialized bit

Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

TABLE 7-4: INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F4013 (BITS 15-8)

SFR

Name

Addr.

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Reset State

CNEN1

00C0 CN15IE CN14IE CN13IE CN12IE CN11IE CN10IE CN9IE

CN8IE

CNEN2

00C2

—

—

—

—

—

—

—

—

CNPU1

00C4 CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE CN8PUE

CNPU2

00C6

—

—

—

—

—

—

—

—

Legend: u = uninitialized bit

1: Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

0000 0000 0000 0000

0000 0000 0000 0000

0000 0000 0000 0000

0000 0000 0000 0000

TABLE 7-5: INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F4013 (BITS 7-0)

SFR

Name

Addr.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset State

CNEN1

CNEN2

CNPU1

CNPU2

Legend:

1:

00C0 CN7IE

CN6IE

CN5IE

CN4IE

CN3IE

CN2IE

CN1IE

CN0IE 0000 0000 0000 0000

00C2 CN23IE CN22IE CN21IE CN20IE CN19IE CN18IE CN17IE CN16IE 0000 0000 0000 0000

00C4 CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE 0000 0000 0000 0000

00C6 CN23PUE CN22PUE CN21PUE CN20PUE CN19PUE CN18PUE CN17PUE CN16PUE 0000 0000 0000 0000

u = uninitialized bit

Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

DS70138E-page 54

© 2007 Microchip Technology Inc.

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