NXP Semiconductors
PCA85176
Universal LCD driver for low multiplex rates
7.18 Display controller
The display controller executes the commands identified by the command decoder. It
contains the device’s status registers and coordinates their effects. The display controller
is also responsible for loading display data into the display RAM in the correct filling order.
8. Internal circuitry
SA0
CLK
OSC
SYNC
A0, A1 A2
BP0, BP1,
BP2, BP3
S0 to S39
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VLCD
VSS
VLCD
VSS
Fig 18. Device protection circuits
VSS
VSS
VSS
VDD
VSS
SCL
SDA
VLCD
mdb076
PCA85176_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
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