ST7SCR
12.2 TIME BASE UNIT (TBU)
12.2.1 Introduction
The Timebase unit (TBU) can be used to generate
periodic interrupts.
12.2.2 Main Features
s 8-bit upcounter
s Programmable prescaler
s Period between interrupts: max. 8.1ms (at 8
MHz fCPU )
s Maskable interrupt
12.2.3 Functional Description
The TBU operates as a free-running upcounter.
When the TCEN bit in the TBUCSR register is set
by software, counting starts at the current value of
the TBUCV register. The TBUCV register is incre-
mented at the clock rate output from the prescaler
selected by programming the PR[2:0] bits in the
TBUCSR register.
Figure 26. TBU Block Diagram
When the counter rolls over from FFh to 00h, the
OVF bit is set and an interrupt request is generat-
ed if ITE is set.
The user can write a value at any time in the
TBUCV register.
12.2.4 Programming Example
In this example, timer is required to generate an in-
terrupt after a delay of 1 ms.
Assuming that fCPU is 8 MHz and a prescaler divi-
sion factor of 256 will be programmed using the
PR[2:0] bits in the TBUCSR register, 1 ms = 32
TBU timer ticks.
In this case, the initial value to be loaded in the
TBUCV must be (256-32) = 224 (E0h).
ld A, E0h
ld TBUCV, A ; Initialize counter value
ld A 1Fh
;
ld TBUCSR, A ; Prescaler factor = 256,
; interrupt enable,
; TBU enable
1
MSB
LSB
0
TBU 8-BIT UPCOUNTER (TBUCV REGISTER)
TBU PRESCALER
fCPU
TBU
0 0 OVF ITE TCEN PR2 PR1 PR0
TBUCSR REGISTER
INTERRUPT REQUEST
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