PCF8578HT View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
PCF8578HT Datasheet PDF : 46 Pages
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NXP Semiconductors
PCF8578
LCD row/column driver for dot matrix graphic displays
R/W
slave address
acknowledge by
all addressed
PCF8578s / PCF8579s
S
S 0 1 1 1 1 0 A 0 AC
COMMAND
A
0
1 byte
n ≥ 0 byte(s)
(a)
a. Master transmits to slave receiver (WRITE mode)
acknowledge
by A0, A1, A2 and A3
selected PCF8578s /
PCF8579s only
DISPLAY DATA
AP
n ≥ 0 byte(s)
update data pointers
and if necessary,
subaddress counter
msa830
acknowledge by
all addressed
PCF8578s / PCF8579s
slave address
S
S 0 1 1 1 1 0 A 0 AC
0
R/W
COMMAND
n ≥ 1 byte
slave address
S
A S 011110A1A
0
R/W
at this moment master
transmitter becomes a
master receiver and
PCF8578/PCF8579 slave
receiver becomes a
slave transmitter
acknowledge
from master
no acknowledge
from master
DATA
A
DATA
1P
n bytes
last byte
update data pointers
and if necessary
subaddress counter
msa832
(b)
b. Master reads after sending command string (write commands; read data)
acknowledge by
all addressed
PCF8578s / PCF8579s
slave address
S
S 011110A1A
0
DATA
acknowledge
from master
no acknowledge
from master
A
DATA
1P
R/W
n bytes
(c)
last byte
update data pointers
and if necessary,
subaddress counter
msa831
c. Master reads slave immediately after sending slave address (READ mode)
Fig 15. I2C-bus protocol
In READ mode, indicated by setting the read/write bit HIGH, data bytes may be read from
the RAM following the slave address acknowledgement. After this acknowledgement the
master transmitter becomes a master receiver and the PCF8578 becomes a slave
transmitter. The master receiver must acknowledge the reception of each byte in turn. The
PCF8578_6
Product data sheet
Rev. 06 — 5 May 2009
© NXP B.V. 2009. All rights reserved.
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