STA335BWS
Register description
6.2.4
Table 13. Supported serial audio input formats for LSB-first (SAIFB = 1)
BICKI
SAI [3:0]
SAIFB
Interface Format
1100
1
I2S 15-bit data
32fs
1110
1
Left/right-justified 16-bit data
0100
1
I2S 23-bit data
0100
1
I2S 20-bit data
1000
1
I2S 18-bit data
1100
1
LSB first I2S 16-bit data
0001
1
Left-justified 24-bit data
0101
1
Left-justified 20-bit data
48fs
1001
1
Left-justified 18-bit data
1101
1
Left-justified 16-bit data
0010
1
Right-justified 24-bit data
0110
1
Right-justified 20-bit data
1010
1
Right-justified 18-bit data
1110
0000
0100
1000
1100
1
Right-justified 16-bit data
1
I2S 24-bit data
1
I2S 20-bit data
1
I2S 18-bit data
1
LSB first I2S 16-bit data
0001
1
Left-justified 24-bit data
0101
1
Left-justified 20-bit data
64fs
1001
1
Left-justified 18-bit data
1101
1
Left-justified 16-bit data
0010
1
Right-justified 24-bit data
0110
1
Right-justified 20-bit data
1010
1
Right-justified 18-bit data
1110
1
Right-justified 16-bit data
Delay serial clock enable
Bit R/W RST
5
R/W
0
Name
DSCKE
Description
0: No serial clock delay
1: Serial clock delay by 1 core clock cycle to tolerate
anomalies in some I2S master devices
29/68