PIC16F636T-I/SL(2005) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F636T-I/SL
(Rev.:2005)
(Rev.:2005)
Microchip Technology
PIC16F636T-I/SL Datasheet PDF : 196 Pages
| |||
PIC12F635/PIC16F636/639
13.0 INSTRUCTION SET SUMMARY
The PIC12F635/PIC16F636/639 instruction set is
highly orthogonal and is comprised of three basic
categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
Each PIC16FXXX instruction is a 14-bit word divided
into an opcode, which specifies the instruction type
and one or more operands, which further specify the
operation of the instruction. The formats for each of the
categories is presented in Figure 13-1, while the
various opcode fields are summarized in Table 13-1.
Table 13-2 lists the instructions recognized by the
MPASMTM assembler. A complete description of each
instruction is also available in the “PICmicro® Mid-Range
MCU Family Reference Manual” (DS33023).
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator, which selects the bit affected by the
operation, while ‘f’ represents the address of the file in
which the bit is located.
For literal and control operations, ‘k’ represents an
8-bit or 11-bit constant, or literal value.
One instruction cycle consists of four oscillator periods;
for an oscillator frequency of 4 MHz, this gives a normal
instruction execution time of 1 μs. All instructions are
executed within a single instruction cycle, unless a
conditional test is true, or the program counter is
changed as a result of an instruction. When this occurs,
the execution takes two instruction cycles, with the
second cycle executed as a NOP.
Note:
To maintain upward compatibility with
future products, do not use the OPTION
and TRIS instructions.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
13.1 Read-Modify-Write Operations
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified and
the result is stored according to either the instruction, or
the destination designator ‘d’. A read operation is
performed on a register even if the instruction writes to
that register.
For example, a CLRF GPIO instruction will read GPIO,
clear all the data bits, then write the result back to
GPIO. This example would have the unintended result
of clearing the condition that set the GPIF flag.
TABLE 13-1: OPCODE FIELD
DESCRIPTIONS
Field
Description
f Register file address (0x00 to 0x7F)
W Working register (accumulator)
b Bit address within an 8-bit file register
k Literal field, constant data or label
x Don’t care location (= 0 or 1).
The assembler will generate code with x = 0.
It is the recommended form of use for
compatibility with all Microchip software tools.
d Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1.
PC Program Counter
TO Time-out bit
PD Power-down bit
FIGURE 13-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Byte-oriented file register operations
13
8 76
0
OPCODE
d
f (FILE #)
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
Bit-oriented file register operations
13
10 9 7 6
0
OPCODE
b (BIT #) f (FILE #)
b = 3-bit bit address
f = 7-bit file register address
Literal and control operations
General
13
OPCODE
87
0
k (literal)
k = 8-bit immediate value
CALL and GOTO instructions only
13
11 10
0
OPCODE
k (literal)
k = 11-bit immediate value
© 2005 Microchip Technology Inc.
Preliminary
DS41232B-page 131
Share Link: 