PIC16F636T-I/SL(2005) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F636T-I/SL
(Rev.:2005)
(Rev.:2005)
Microchip Technology
PIC16F636T-I/SL Datasheet PDF : 196 Pages
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PIC12F635/PIC16F636/639
DECFSZ
Decrement f, Skip if 0
Syntax:
[ label ] DECFSZ f,d
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
Operation:
(f) – 1 → (destination);
skip if result = 0
Status Affected: None
Description:
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is placed back in register ‘f’.
If the result is ‘1’, the next instruction
is executed. If the result is ‘0’, then a
NOP is executed instead, making it a
2-cycle instruction.
GOTO
Unconditional Branch
Syntax:
[ label ] GOTO k
Operands:
0 ≤ k ≤ 2047
Operation:
k → PC<10:0>
PCLATH<4:3> → PC<12:11>
Status Affected: None
Description:
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a two-cycle
instruction.
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f
[ label ] INCF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (destination)
Z
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
INCFSZ
Increment f, Skip if 0
Syntax:
[ label ] INCFSZ f,d
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
Operation:
(f) + 1 → (destination),
skip if result = 0
Status Affected: None
Description:
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’, the
result is placed back in
register ‘f’.
If the result is ‘1’, the next instruction
is executed. If the result is ‘0’, a NOP is
executed instead, making it a 2-cycle
instruction.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR Literal with W
[ label ] IORLW k
0 ≤ k ≤ 255
(W) .OR. k → (W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
IORWF
Inclusive OR W with f
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] IORWF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .OR. (f) → (destination)
Z
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
© 2005 Microchip Technology Inc.
Preliminary
DS41232B-page 135
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