PIC12F635/PIC16F636/639
13.2 Instruction Descriptions
ADDLW
Add Literal and W
Syntax:
[ label ] ADDLW k
Operands:
0 ≤ k ≤ 255
Operation:
(W) + k → (W)
Status Affected: C, DC, Z
Description:
The contents of the W register are
added to the eight-bit literal ‘k’ and
the result is placed in the W register.
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Clear f
[ label ] BCF f,b
0 ≤ f ≤ 127
0≤b≤7
0 → (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
ADDWF
Add W and f
Syntax:
[ label ] ADDWF f,d
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
Operation:
(W) + (f) → (destination)
Status Affected: C, DC, Z
Description:
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the result
is stored in the W register. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Set f
[ label ] BSF f,b
0 ≤ f ≤ 127
0≤b≤7
1 → (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND Literal with W
[ label ] ANDLW k
0 ≤ k ≤ 255
(W) .AND. (k) → (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
BTFSC
Bit Test f, Skip if Clear
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] BTFSC f,b
0 ≤ f ≤ 127
0≤b≤7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded and a NOP
is executed instead, making this a
2-cycle instruction.
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND W with f
[ label ] ANDWF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .AND. (f) → (destination)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
BTFSS
Bit Test f, Skip if Set
Syntax:
[ label ] BTFSS f,b
Operands:
0 ≤ f ≤ 127
0≤b<7
Operation: skip if (f<b>) = 1
Status Affected: None
Description:
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next instruction is
discarded and a NOP is executed instead,
making this a 2-cycle instruction.
© 2005 Microchip Technology Inc.
Preliminary
DS41232B-page 133