PIC12F635/PIC16F636/639
RETFIE
Return from Interrupt
Syntax:
[ label ] RETFIE
Operands:
None
Operation:
TOS → PC,
1 → GIE
Status Affected: None
Encoding:
00
0000 0000 1001
Description:
Return from interrupt. Stack is POPed
and Top-of-Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting the Global Interrupt Enable bit,
GIE (INTCON<7>). This is a
two-cycle instruction.
Words:
1
Cycles:
2
Example:
RETFIE
After Interrupt
PC = TOS
GIE = 1
RETLW
Return with Literal in W
Syntax:
[ label ] RETLW k
Operands:
0 ≤ k ≤ 255
Operation:
k → (W);
TOS → PC
Status Affected: None
Encoding:
11
01xx kkkk kkkk
Description:
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of the
stack (the return address). This is a
two-cycle instruction.
Words:
1
Cycles:
2
Example:
TABLE
CALL TABLE ;W contains table
;offset value
•
;W now has table value
•
•
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
•
•
•
RETLW kn ; End of table
Before Instruction
W = 0x07
After Instruction
W = value of k8
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
Return from Subroutine
[ label ] RETURN
None
TOS → PC
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
RLF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Rotate Left f through Carry
[ label ] RLF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
00
1101 dfff ffff
The contents of register ‘f’ are
rotated one bit to the left through
the CARRY flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
C
Register f
Words:
Cycles:
Example:
1
1
RLF
REG1,0
Before Instruction
REG1 =
C
=
After Instruction
REG1 =
W
=
C
=
1110 0110
0
1110 0110
1100 1100
1
© 2005 Microchip Technology Inc.
Preliminary
DS41232B-page 137