ST92F250CV2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F250CV2

8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.0B and J1850 BLPD

STMicroelectronics 

ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2

Device architecture

6.7.4

chapter.

● During DMA transactions between the peripheral and memory when the PS bit of the

DAPR register is reset: ISR points to the 64 K-byte Memory segment that will be

involved in the DMA transaction.

DMASR: DMA segment register

DMA SEGMENT REGISTER (DMASR)

R249 - Read/Write

Register Page: 21

Reset value: undefined

7

0

0

0 DMA SR_5 DMA SR_4 DMA SR_3 DMA SR_2 DMA SR_1 DMA SR_0

Bits 7:6 = Reserved, keep in reset state.

Bits 5:0 = DMASR_[5:0]: These bits define the 64-Kbyte Memory segment (among 64) used

when a DMA transaction is performed between the peripheral's data register and Memory,

with the PS bit of the DAPR register set. These bits are used as the most significant address

bits (A21-16). If the PS bit is reset, the ISR register is used to extend the address.

Doc ID 8848 Rev 7

71/523

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