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ST92F250CV2 View Datasheet(PDF) - STMicroelectronics

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ST92F250CV2 Datasheet PDF : 524 Pages
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Device architecture
ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2
6.8.3
DMA
Depending on the PS bit in the DAPR register (see DMA chapter), DMA uses either the ISR
or the DMASR for memory accesses: this guarantees that a DMA will always find its
memory segment(s), no matter what segment changes the application has performed.
Unlike interrupts, DMA transactions cannot save/restore paging registers, so a dedicated
segment register (DMASR) has been created. Having only one register of this kind means
that all DMA accesses should be programmed in one of the two following segments: the one
pointed to by the ISR (when the PS bit of the DAPR register is reset), and the one
referenced by the DMASR (when the PS bit is set).
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Doc ID 8848 Rev 7

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