STM8S105K6U3C View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8S105K6U3C

Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

STM8S105xx

Electrical characteristics

10.3.10 I2C interface characteristics

Table 44: I2C characteristics

Symbol Parameter

Standard mode I2C Fast mode I2C(1) Unit

Min(2)

Max(2) Min(2)

Max(2)

tw(SCLL) SCL clock low time

4.7

1.3

μs

tw(SCLH) SCL clock high time

4.0

0.6

μs

tsu(SDA) SDA setup time

250

th(SDA) SDA data hold time

0(3)

100

ns

0(4)

900(3) ns

tr(SDA)

tr(SCL)

SDA and SCL rise time

1000

300 ns

tf(SDA)

tf(SCL)

SDA and SCL fall time

300

300 ns

th(STA) START condition hold time

4.0

0.6

μs

tsu(STA) Repeated START condition

4.7

setup time

0.6

μs

tsu(STO) STOP condition setup time

4.0

tw(STO:STA) STOP to START condition time

4.7

(bus free)

0.6

μs

1.3

μs

Cb

Capacitive load for each bus line

400

400 pF

(1) fMASTER, must be at least 8 MHz to achieve max fast I2C speed (400kHz).

(2) Data based on standard I2C protocol requirement, not tested in production.

(3) The maximum hold time of the start condition has only to be met if the interface does not stretch the

low time.

(4) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge

the undefined region of the falling edge of SCL.

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