dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
FIGURE 19-3:
ADC BLOCK DIAGRAM FOR dsPIC33FJ06GS202 DEVICES WITH ONE SAR
Even Numbered Inputs with Dedicated
Sample and Hold (S&H) Circuits
AN0
AN2
AN12(1)
(EXTREF)
AN1
AN3
AN4
SAR
Core
Shared Sample and Hold
Eight
16-Bit
Registers
AN5
AN13(2)
(INTREF)
Note 1: AN12 (EXTREF) is an internal analog input. To measure the voltage at AN12 (EXTREF), an analog comparator must be enabled
and EXTREF must be selected as the comparator reference.
2: AN13 (INTREF) is an internal analog input and is not available on a pin.
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 241