dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
FIGURE 19-5:
ADC BLOCK DIAGRAM FOR dsPIC33FJ16GS502 DEVICES WITH TWO SARS
Even Numbered Inputs with Dedicated
Sample and Hold (S&H) Circuits
AN0
AN2
SAR
Core
Five
16-Bit
Registers
AN4
AN6
AN12(1)
(EXTREF)
Even numbered inputs
with shared S&H
AN1
AN3
AN5
AN7
AN13(2)
(INTREF)
Odd Numbered Inputs
with Shared S&H
SAR
Core
Five
16-Bit
Registers
Note 1:
2:
AN12 (EXTREF) is an internal analog input. To measure the voltage at AN12 (EXTREF), an analog comparator must be enabled
and EXTREF must be selected as the comparator reference.
AN13 (INTREF) is an internal analog input and is not available on a pin.
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 243