ST7LITE1xB
DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)
11.2.3.5 Input Capture Mode
The 12-bit ATICR register is used to latch the val-
ue of the 12-bit free running upcounter CNTR1 af-
ter a rising or falling edge is detected on the ATIC
pin. When an input capture occurs, the ICF bit is
set and the ATICR register contains the value of
the free running upcounter. An IC interrupt is gen-
erated if the ICIE bit is set. The ICF bit is reset by
reading the ATICRH/ATICRL register when the
ICF bit is set. The ATICR is a read only register
and always contains the free running upcounter
value which corresponds to the most recent input
capture. Any further input capture is inhibited while
the ICF bit is set.
Figure 43. Block Diagram of Input Capture Mode
ATIC
12-BIT INPUT CAPTURE REGISTER
ATICR
IC INTERRUPT
ATCSR
REQUEST
ICF ICIE CK1 CK0
fLTIMER
(1 ms
timebase
@ 8 MHz)
fCPU
32 MHz
OFF
CNTR1
12-BIT UPCOUNTER1
12-BIT AUTORELOAD REGISTER
ATR1
Figure 44. Input Capture timing diagram
fCOUNTER
COUNTER1 01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
ATIC PIN
ICF FLAG
xxh
INTERRUPT
ATICR READ
INTERRUPT
04h
09h
t
64/159
1