ST7PLIT110BF0M3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PLIT110BF0M3

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI

STMicroelectronics 

ST7LITE1xB

DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)

8. Set the OP_EN bit in the PWM3CSR register to

enable one-pulse mode.

9. Enable the PWM3 output by setting the OE3 bit

in the PWMCR register.

The "Wait for Overflow event" in step 6 can be re-

placed by forced update (writing the FORCE2 bit).

Follow the same procedure for PWM2 with the bits

corresponding to PWM2.

Note: When break is applied in one-pulse mode,

the CNTR2, DCR2/3 & ATR2 registers are reset.

Consequently, these registers have to be initial-

ized again when break is removed.

Figure 47. Block Diagram of One Pulse Mode

LTIC pin

Edge

Selection

12-bit Upcounter 2

OPEDGE OP_EN

PWM3CSR Register

12-bit AutoReload Register 2

12-bit Active DCR2/3

PWM

Generation

PWM2/3

OP2/3

Figure 48. One Pulse Mode and PWM Timing Diagram

fcounter2

CNTR2

LTIC

000

DCR2/3

000

DCR2/3

ATR2 000

PWM2/3

fcounter2

CNTR2

LTIC

PWM2/3

OVF ATR2

DCR2/3

OVF ATR2

DCR2/3

Note 1: When OP_EN=0, LTIC edges are not taken into account as the timer runs in PWM mode.

OVF ATR2

68/159

1

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