ST72P623 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72P623

LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI

STMicroelectronics 

ST7262xxx

Figure 16. Low Voltage Reset Signal Output

VIT+

VIT-

VDD

RESET

Note: Typical hysteresis (VIT+-VIT-) of 250 mV is expected.

) Figure 17. Temporization Timing Diagram after an internal Reset

ct(s VDD

VIT+

olete Produ Addresses

Temporization

(514 CPU clock cycles)

$FFFE

) - Obs Figure 18. Reset Timing Diagram

duct(s VDD

tDDR

Pro OSCIN

Obsolete fCPU

tOXOV

PC

FFFE FFFF

RESET

514 CPU

CLOCK

CYCLES

DELAY

Note: Refer to Electrical Characteristics for values of tDDR, tOXOV, VIT+ and VIT-.

22/139

Doc ID 6996 Rev 5

Share Link: