ST72P623 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72P623

LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI

STMicroelectronics 

ST7262xxx

8 POWER SAVING MODES

8.1 INTRODUCTION

There are three Power Saving modes. Slow Mode

is selected by setting the SMS bits in the Miscella-

neous register. Wait and Halt modes may be en-

tered using the WFI and HALT instructions.

Figure 24. WAIT Mode Flow Chart

WFI INSTRUCTION

After a RESET the normal operating mode is se-

lected by default (RUN mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided by 3 and multi-

) plied by 2 (fCPU).

t(s From Run mode, the different power saving

c modes may be selected by setting the relevant

u register bits or by calling the specific ST7 software

d instruction whose action depends on the oscillator

ro status.

te P 8.1.1 Slow Mode

le In Slow mode, the oscillator frequency can be di-

vided by a value defined in the Miscellaneous

so Register. The CPU and peripherals are clocked at

b this lower frequency. Slow mode is used to reduce

power consumption, and enables the user to adapt

O clock frequency to available supply voltage.

ct(s) - 8.2 WAIT MODE

u WAIT mode places the MCU in a low power con-

rod sumption mode by stopping the CPU.

This power saving mode is selected by calling the

P “WFI” ST7 software instruction.

te All peripherals remain active. During WAIT mode,

the I bit of the CC register is forced to 0, to enable

le all interrupts. All other registers and memory re-

o main unchanged. The MCU remains in WAIT

s mode until an interrupt or Reset occurs, whereup-

b on the Program Counter branches to the starting

O address of the interrupt or Reset service routine.

OSCILLATOR

PERIPH. CLOCK

CPU CLOCK

I-BIT

ON

ON

OFF

CLEARED

N

N

INTERRUPT

RESET

Y

Y

OSCILLATOR

ON

PERIPH. CLOCK ON

CPU CLOCK

ON

I-BIT

SET

IF RESET

514 CPU CLOCK

CYCLES DELAY

FETCH RESET VECTOR

The MCU will remain in WAIT mode until a Reset

or an Interrupt occurs, causing it to wake up.

OR SERVICE INTERRUPT

Refer to Figure 24.

Note: Before servicing an interrupt, the CC register is

pushed on the stack. The I-Bit is set during the inter-

rupt routine and cleared when the CC register is

popped.

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Doc ID 6996 Rev 5

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