ST72P623 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72P623

LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI

STMicroelectronics 

ST7262xxx

9 I/O PORTS

9.1 INTRODUCTION

The I/O ports offer different functional modes:

ble, the options are given in the description of the

transfer of data through digital inputs and outputs ITRFRE interrupt registers.

and for specific pins:

Each pin can independently generate an Interrupt

– Analog signal input (ADC)

request.

– Alternate signal input/output for the on-chip pe-

ripherals.

Each external interrupt vector is linked to a dedi-

cated group of I/O port pins (see Interrupts sec-

tion). If more than one input pin is selected simul-

– External interrupt generation

An I/O port is composed of up to 8 pins. Each pin

t(s) can be programmed independently as digital input

or digital output.

uc 9.2 FUNCTIONAL DESCRIPTION

rod Each port is associated with 2 main registers:

P – Data Register (DR)

te – Data Direction Register (DDR)

le Each I/O pin may be programmed using the corre-

o sponding register bits in DDR register: bit x corre-

s sponding to pin x of the port. The same corre-

b spondence is used for the DR register.

- O Table 8. I/O Pin Functions

) DDR

t(s 0

c 1

MODE

Input

Output

rodu 9.2.1 Input Modes

P The input configuration is selected by clearing the

te corresponding DDR register bit.

le In this case, reading the DR register returns the

o digital value applied to the external I/O pin.

bs Notes:

O 1. All the inputs are triggered by a Schmitt trigger.

taneously as interrupt source, this is logically AN-

Ded and inverted. For this reason, if an event oc-

curs on one of the interrupt pins, it masks the other

ones.

9.2.2 Output Mode

The pin is configured in output mode by setting the

corresponding DDR register bit (see Table 7).

In this mode, writing “0” or “1” to the DR register

applies this digital value to the I/O pin through the

latch. Then reading the DR register returns the

previously stored value.

Note: In this mode, the interrupt function is disa-

bled.

9.2.3 Alternate Functions

Digital Alternate Functions

When an on-chip peripheral is configured to use a

pin, the alternate function is automatically select-

ed. This alternate function takes priority over

standard I/O programming. When the signal is

coming from an on-chip peripheral, the I/O pin is

automatically configured in output mode (push-pull

or open drain according to the peripheral).

When the signal is going to an on-chip peripheral,

the I/O pin has to be configured in input mode. In

this case, the pin state is also digitally readable by

addressing the DR register.

Notes:

1. Input pull-up configuration can cause an unex-

pected value at the alternate peripheral input.

2. When switching from input mode to output

mode, the DR register should be written first to

output the correct value as soon as the port is

configured as an output.

2. When the on-chip peripheral uses a pin as input

and output, this pin must be configured as an

input (DDR = 0).

Interrupt function

When an external interrupt function of an I/O pin, is

Warning: Alternate functions of peripherals must

must not be activated when the external interrupts

are enabled on the same pin, in order to avoid

enabled using the ITFRE registers, an event on generating spurious interrupts.

this I/O can generate an external Interrupt request

to the CPU. The interrupt sensitivity is programma-

32/139

Doc ID 6996 Rev 5

Share Link: