ST72P623 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72P623

LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI

STMicroelectronics 

ST7262xxx

I/O PORTS (Cont’d)

9.2.9 Register Description

DATA REGISTER (DR)

Port x Data Register

PxDR with x = A, B, C or D.

Read / Write

Reset Value: 0000 0000 (00h)

DATA DIRECTION REGISTER (DDR)

Port x Data Direction Register

PxDDR with x = A, B, C or D.

Read / Write

Reset Value: 0000 0000 (00h)

7

0

7

0

DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0

D7 D6 D5 D4 D3 D2 D1 D0

ct(s) Bits 7:0 = D[7:0] Data register 8 bits.

u The DR register has a specific behaviour accord-

d ing to the selected input/output configuration. Writ-

ro ing the DR register is always taken into account

P even if the pin is configured as an input; this allows

to always have the expected level on the pin when

te toggling to output mode. Reading the DR register

le returns either the DR register latch content (pin

o configured as output) or the digital value applied to

Obsolete Product(s) - Obs the I/O pin (pin configured as input).

Bits 7:0 = DD[7:0] Data direction register 8 bits.

The DDR register gives the input/output direction

configuration of the pins. Each bit is set and

cleared by software.

0: Input mode

1: Output mode

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Doc ID 6996 Rev 5

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