S25FL256SDPMFVC03 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

S25FL256SDPMFVC03

128 Mbit (16 Mbyte), 256 Mbit (32 Mbyte) 3.0V SPI Flash Memory

Cypress Semiconductor 

S25FL128S, S25FL256S

Table 7.16 Bank Address Register (BAR)

Bits

7

6 to 1

0

Field Name

Function

EXTADD Extended Address Enable

RFU

BA24

Reserved

Bank Address

Type

Volatile

Volatile

Volatile

Default State

0b

00000b

0

Description

1 = 4-byte (32-bits) addressing required from command.

0 = 3-byte (24-bits) addressing from command + Bank Address

Reserved for Future Use

A24 for 256-Mbit device, RFU for lower density device

Extended Address (EXTADD) BAR[7]: EXTADD controls the address field size for legacy SPI commands. By default (power up

reset, hardware reset, and software reset), it is cleared to 0 for 3 bytes (24 bits) of address. When set to 1, the legacy commands will

require 4 bytes (32 bits) for the address field. This is a volatile bit.

7.5.6

ASP Register (ASPR)

Related Commands: ASP Read (ASPRD 2Bh) and ASP Program (ASPP 2Fh).

The ASP register is a 16-bit OTP memory location used to permanently configure the behavior of Advanced Sector Protection (ASP)

features.

Table 7.17 ASP Register (ASPR)

Bits

15 to 9

8

7

6

5

4

3

2

1

0

Field Name

RFU

RFU

RFU

RFU

RFU

RFU

RFU

PWDMLB

PSTMLB

RFU

Function

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Password Protection

Mode Lock Bit

Persistent Protection

Mode Lock Bit

Reserved

Type

OTP

OTP

OTP

OTP

OTP

OTP

OTP

OTP

OTP

OTP

Default

State

1

(Note 1)

(Note 1)

1

(Note 1)

(Note 1)

(Note 1)

1

1

1

Description

Reserved for Future Use

Reserved for Future Use

Reserved for Future Use

Reserved for Future Use

Reserved for Future Use

Reserved for Future Use

Reserved for Future Use

0 = Password Protection Mode permanently enabled.

1 = Password Protection Mode not permanently enabled.

0 = Persistent Protection Mode permanently enabled.

1 = Persistent Protection Mode not permanently enabled.

Reserved for Future Use

Note:

1. Default value depends on ordering part number, see Initial Delivery State on page 135.

Reserved for Future Use (RFU) ASPR[15:3, 0].

Password Protection Mode Lock Bit (PWDMLB) ASPR[2]: When programmed to 0, the Password Protection Mode is

permanently selected.

Persistent Protection Mode Lock Bit (PSTMLB) ASPR[1]: When programmed to 0, the Persistent Protection Mode is

permanently selected. PWDMLB and PSTMLB are mutually exclusive, only one may be programmed to zero.

Document Number: 001-98283 Rev. *I

Page 54 of 144

Share Link: