Clock operation
M48T212V
powered-up periodically (at least once every few months) in order for this technique to be
beneficial.
Additionally, if a battery low is indicated, data integrity should be verified upon power-up via
a checksum or other technique.
3.12
Initial power-on defaults
Upon application of power to the device, the following register bits are set to a ’0' state:
WDS, BMB0-BMB4, RB0-RB1, AFE, ABE, W, and FT (see Table 10).
Table 10. Default values
Condition
W
R
Initial power-up
(Battery attach for SNAPHAT)(2)
RESET (3)
Power-down (4)
Subsequent power-up
0
0
0
0
0
1
0
1
1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. State of other control bits remains unchanged.
4. Assuming these bits set to '1' prior to power-down.
FT
AFE
ABE
Watchdog
register(1)
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
Figure 10. Crystal accuracy across temperature
Frequency (ppm)
20
0
–20
–40
–60
–80
–100
–120
–140
–160
–40 –30 –20 –10 0
ΔF
F
= -0.038
ppm
C2
(T
-
T0)2
±
10%
T0 = 25 °C
10 20 30 40 50 60 70 80
Temperature °C
AI00999
24/35