CDB8952T-IQ View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CDB8952T-IQ Datasheet PDF : 86 Pages
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CS8952T
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
Interrupt Status Register - Address 11h (Cont.)
BIT
NAME
TYPE
8
Remote Loopback Read Only 0
Fault
RESET
DESCRIPTION
When set, this bit indicates that the Elastic Buffer has
detected an over-run or an under-run condition. In
any case, the frame generating this fault will be termi-
nated.
7
Reset Complete Read Only 0
6
Jabber Detect
Read Only 0
This should never happen since the depth of the elas-
tic buffer (10 bits) is greater than twice the maximum
number of bit times the receive and transmit clocks
may slip during a maximum length packet assuming
clock frequency tolerances of 100 ppm or less.
When set, this bit indicates that the internal analog
calibration cycle has completed, and all analog and
digital circuitry is ready for normal operation.
In 10BASE-T mode, if the last transmission is longer
than 105 ms, then the packet output is terminated by
the jabber logic and this bit is set.
This bit is implemented with a latching function so
that the occurrence of a jabber condition causes it to
become set until it is cleared by a read to this register,
a read to the Basic Mode Status Register (address
01h), or a reset.
No jabber detect function has been defined for
100BASE-TX.
5
Auto-Neg Complete Read Only 0
This bit is the same as in the Basic Mode Status Reg-
ister (address 01h).
This bit is set when the auto-negotiation process has
completed. This is an indication that the Auto-Negoti-
ation Advertisement Register (address 04h), the
Auto-Negotiation Link Partner Ability Register
(address 05h), and the Auto-Negotiation Expansion
Register (address 06h) are valid.
4
Parallel Detection Read Only 0
Fault
This bit is the same as in the Basic Mode Status Reg-
ister (address 01h).
When set, this bit indicates an error condition in
which auto-negotiation has detected that unstable
10BASE-T or 100BASE-TX link signalling was
received. This bit is self-clearing.
3
Parallel Fail
Read Only 0
This bit is the same as in the Auto-Negotiation
Expansion Register (address 06h)
When set, this bit indicates that a parallel detection
has occurred for a technology that is not currently
advertised by the local device.
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
DS206TPP2
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