IO_VDD
Input Pin
Figure 3-5: Digital Input Pin with Weak Pull Up(>33kΩ)
(ACLK[2:1], WCLK[2:1], AIN[4:1], PCLK, DIN[19:0])
IO_VDD
Input Pin
Figure 3-6: 5V Tolerant Input Pin (All Other Input Pins)
EN
Output Pin
Figure 3-7: Digital Output Pin with High Impedance Mode
(LOCKED, AUDIO_INT, SDOUT_TDO)
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleanerTM
Data Sheet
40117 - 4
December 2011
25 of 115