PCLK
DIN[19:0]
DATA
Control signal
input
tSU
tIH
Figure 4-1: PCLK to Data Timing
4.2.1 Parallel Input in SMPTE Mode
When the device is operating in SMPTE mode, see SMPTE Mode on page 29, both SD and
HD data may be presented to the input bus in either multiplexed or demultiplexed form
depending on the setting of the 20bit/10bit input pin.
In 20-bit mode, (20bit/10bit = HIGH), the input data format should be word aligned,
demultiplexed luma and chroma data. Luma words should be presented on DIN[19:10]
while chroma words should be presented on DIN[9:0].
In 10-bit mode, (20bit/10bit = LOW), the input data format should be word aligned,
multiplexed luma and chroma data. The data should be presented on DIN[19:10].
DIN[9:0] will be high impedance in this mode.
4.2.2 Parallel Input in DVB-ASI Mode
When operating in DVB-ASI mode, see DVB-ASI mode on page 35, the GS1582 must be
set to 10-bit operation mode by setting the 20bit/10bit pin LOW.
The device will accept 8-bit data words on DIN[17:10]. DIN17 = HIN is the most
significant bit of the encoded transport stream data and DIN10 = AIN is the least
significant bit.
In addition, DIN19 and DIN18 will be configured as the DVB-ASI control signals
INSSYNCIN and KIN respectively. See DVB-ASI mode on page 35 for a description of
these DVB-ASI specific input signals.
DIN[9:0] will have a Logic Level HIGH in DVB-ASI mode.
4.2.3 Parallel Input in Data-Through Mode
When operating in Data-Through mode, see Data-Through Mode on page 36, the
GS1582 passes data from the parallel input bus to the serial output without performing
any encoding or scrambling. The input data bus width is controlled by the setting of the
20bit/10bit pin.
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleanerTM
Data Sheet
40117 - 4
December 2011
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