STM32WB35RGQ7TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32WB35RGQ7TR

Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution

STMicroelectronics 

Electrical characteristics

STM32WB55xx STM32WB35xx

Table 50. Peripheral current consumption (continued)

Peripheral

Range 1

Range 2

Low-power

run and sleep

Unit

APB1

APB2

RTCA

CRS

USB FS independent clock domain

USB FS clock domain

I2C1 independent clock domain

I2C1 clock domain

I2C3 independent clock domain

I2C3 clock domain

LCD

SPI2

LPTIM1 independent clock domain

LPTIM1 clock domain

TIM2

LPUART1 independent clock domain

LPUART1 clock domain

LPTIM2 clock domain

LPTIM2 independent clock domain

WWDG

All APB1 peripherals

AHB to APB2(3)

TIM1

TIM17

TIM16

USART1 independent clock domain

USART1 clock domain

SPI1

SAI1 independent clock domain

SAI1 clock domain

All APB2 on

ALL

1.10

0.24

3.20

2.05

2.50

4.80

2.10

3.70

1.35

1.65

2.10

3.60

5.65

2.70

4.45

3.95

2.20

0.335

27.0

1.10

8.20

2.85

2.75

4.40

8.80

1.75

2.50

2.40

28.0

97.5

0.88

0.20

N/A

N/A

4.40

4.00

3.50

3.10

1.10

1.40

3.40

3.00

4.70

4.15

3.70

3.25

3.70

0.285

22.5

0.885

6.80

2.40

2.30

7.80

7.30

1.45

1.50

N/A

23.0

80.5

1.25

0.20

N/A

N/A

4.40

5.50

3.55

3.55

2.10

2.25

3.00

3.80

4.90

3.85

5.25

4.50

3.80

0.965

25.5

1.35

7.25

2.40

2.55

7.00

7.75

1.45

3.50

N/A

25.5

90.0

µA/MHz

1. The BusMatrix is automatically active when at least one master is ON (CPU, DMA).

2. GPIOs consumption during read and write accesses.

3. The AHB to APB2 bridge is automatically active when at least one peripheral is ON on the APB2.

116/193

DS11929 Rev 10

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