CL-PS7500FE 查看數據表（PDF） - Cirrus Logic
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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
22.6 Memory Subsystems
Table 22-3. ROM Timing
Symbol
t la
tds_rom
trcsl
trcsh
tdh_rom
trda1
trda2
trda3
trdah
troel
troeh
trwel
trweh
Parameter
MEMCLK rising to LA[28:0] changing
Data setup to MEMCLK rising
MEMCLK rising to nROMCS falling
MEMCLK rising to nROMCS rising
DATA hold from MEMCLK rising
MEMCLK rising to write DATA valid
MEMCLK rising to write DATA valid
MEMCLK rising to write DATA valid
Write DATA hold after MEMCLK rising
MEMCLK rising to nIOR (nOE) falling
MEMCLK rising to nIOR (nOE) rising
MEMCLK rising to nIOR (nOE) falling
MEMCLK rising to nIOR (nOE) rising
40 MHz
MIN MAX
23
0
18
20
12
22
33
16
11
14
14
14
13
56 MHz
MIN MAX
23
0
18
20
12
22
33
16
11
14
14
14
13
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
June 1997
ADVANCE DATA BOOK v2.0
ELECTRICAL SPECIFICATIONS
201
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