CL-PS7500FE 查看數據表（PDF） - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

LA[28:0]

tl a

MEMCLK

Address

Address + 4

tl a

D[31:0]

nROMCS

tr c s l

td s _ r o m

td h _ r o m

tr c s h

nIOW (nWE)

nIOR (nOE)

tr o e l

tr o e h

Figure 22-2. ROM Read Access Timing without Burst Mode (32 Bit)

LA[28:0]

tl a

MEMCLK

D[31:0]

nROMCS

nIOW (nWE)

nIOR (nOE)

Cycle Type

Address

Address + 4

tl a

Address + 8

tr c s l

td s _ r o m

td h _ r o m

tr o e l

Non Sequential

Burst

tr c s h

Burst

tr o e h

Figure 22-3. ROM Read Access Timing, Burst Mode (32 Bit)

202

ELECTRICAL SPECIFICATIONS

ADVANCE DATA BOOK v2.0

June 1997

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