ADE3700XT 查看數據表（PDF） - STMicroelectronics
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ADE3700XT Datasheet PDF : 89 Pages
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Output Multiplexer
Register Name
OMUX_CTRL_2
OMUX_DLY_BA0
OMUX_ DLY_BA2
OMUX_ DLY_BA4
OMUX_ DLY_BA6
OMUX_ DLY_GA0
OMUX_ DLY_GA2
OMUX_ DLY_GA4
OMUX_ DLY_GA6
OMUX_ DLY_RA0
OMUX_ DLY_RA2
OMUX_ DLY_RA4
OMUX_ DLY_RA6
OMUX_ DLY_BB0
ADE3700
Table 32: Output Mux Registers (Sheet 2 of 4)
Addr Mode Bits
0x0C32 R/W
[7]
R/W
[6]
R/W
[5]
R/W
[4]
R/W
[3]
R/W
[2]
R/W
[1]
R/W
[0]
0x0C50 R/W
[7:4]
R/W
[3:0]
0x0C4F R/W
[7:4]
R/W
[3:0]
0x0C4E R/W
[7:4]
R/W
[3:0]
0x0C4D R/W
[7:4]
R/W
[3:0]
0x0C4C R/W
[7:4]
R/W
[3:0]
0x0C4B R/W
[7:4]
R/W
[3:0]
0x0C4A R/W
[7:4]
R/W
[3:0]
0x0C49 R/W
[7:4]
R/W
[3:0]
0x0C48 R/W
[7:4]
R/W
[3:0]
0x0C47 R/W
[7:4]
R/W
[3:0]
0x0C46 R/W
[7:4]
R/W
[3:0]
0x0C45 R/W
[7:4]
R/W
[3:0]
0x0C44 R/W
[7:4]
R/W
[3:0]
Default
Description
0x0
Separate TCON driven invert enable
0x0
TCON driven invert pin enable
0x0
RSDS enable
0x0
Per Pin Delay Enable
0x0
Resync on Vsync Falling Edge
0x0
Resync on Vsync Rising Edge
0x0
Resync on Hsync Falling Edge
0x0
Resync on Hsync Rising Edge
0x0
Delay for OBA1
0x0
Delay for OBA0
0x0
Delay for OBA3
0x0
Delay for OBA2
0x0
Delay for OBA5
0x0
Delay for OBA4
0x0
Delay for OBA7
0x0
Delay for OBA6
0x0
Delay for OGA1
0x0
Delay for OGA0
0x0
Delay for OGA3
0x0
Delay for OGA2
0x0
Delay for OGA5
0x0
Delay for OGA4
0x0
Delay for OGA7
0x0
Delay for OGA6
0x0
Delay for ORA1
0x0
Delay for ORA0
0x0
Delay for ORA3
0x0
Delay for ORA2
0x0
Delay for ORA5
0x0
Delay for ORA4
0x0
Delay for ORA7
0x0
Delay for ORA6
0x0
Delay for OBB1
0x0
Delay for OBB0
78/89
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