ADSP-BF512/BF514/BF514F16/BF516/BF518/BF518F16
General-Purpose Port Timing
Table 39 and Figure 28 describe general-purpose
port operations.
Table 39. General-Purpose Port Timing
VDDEXT
1.8V Nominal
Parameter
Min
Max
Timing Requirement
tWFI
General-Purpose Port Signal Input Pulse Width
Switching Characteristic
tSCLK + 1
tGPOD
General-Purpose Port Signal Output Delay from CLKOUT Low 0
11
VDDEXT
2.5 V/3.3V Nominal
Min
Max
Unit
tSCLK + 1
ns
0
8.5
ns
CLKOUT
GPIO OUTPUT
GPIO INPUT
tGPOD
tWFI
Figure 28. General-Purpose Port Timing
Timer Clock Timing
Table 40 and Figure 29 describe timer clock timing.
Table 40. Timer Clock Timing
Parameter
Switching Characteristic
tTODP
Timer Output Update Delay After PPICLK High
Min
Max
Unit
12
ns
PPI_CLK
TMRx OUTPUT
tTODP
Figure 29. Timer Clock Timing
Rev. D | Page 45 of 68 | April 2014