FDC37C672 View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37C672

Enhanced Super I/O Controller with Fast IR

SMSC -> Microchip 

Enhanced Super I/O Controller with Fast IR

Datasheet

NAME

Serial Port 1

Mode Register

Default = 0x00

on Vcc POR or

Reset_Drv

Table 19.9 - Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]

REG INDEX

0xF0 R/W

DEFINITION

Bit[0] MIDI Mode

= 0 MIDI support disabled (default)

= 1 MIDI support enabled

Bit[1] High Speed

= 0 High Speed Disabled(default)

= 1 High Speed Enabled

STATE

C

Bit[6:2] Reserved, set to zero

Bit[7]: Share IRQ

=0 UARTS use different IRQs

=1 UARTS share a common IRQ

See Note 19.7 below.

Note 19.7 To properly share and IRQ,

1. Configure UART1 (or UART2) to use the desired IRQ pin.

2. Configure UART2 (or UART1) to use No IRQ selected.

3. Set the share IRQ bit.

Note: If both UARTs are configured to use different IRQ pins and the share IRQ bit is set, then both of the

UART IRQ pins will assert when either UART generates an interrupt.

SMSC FDC37C672

Page 135

DATASHEET

Rev. 10-29-03

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