FDC37C672 View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37C672

Enhanced Super I/O Controller with Fast IR

SMSC -> Microchip 

Enhanced Super I/O Controller with Fast IR

Datasheet

NAME

KRST_GA20

Default = 0x00

on Vcc POR or

Reset_Drv

Table 19.11 - KYBD, Logical Device 7 [Logical Device Number = 0x07]

REG INDEX

0xF0

R/W

0xF1 -

0xFF

DEFINITION

KRESET and GateA20 Select

Bit[7] Polarity Select for P12

= 0 P12 active low (default)

= 1 P12 active high

Bits[6:3] Reserved

Bit[2] Port 92 Select

= 0 Port 92 Disabled

= 1 Port 92 Enabled

Bit[1] Reserved

Bit[0] Reserved

Reserved - read as ‘0’

STATE

Table 19.12 - Auxiliary I/O, Logical Device 8 [Logical Device Number = 0x08]

NAME

SMI Enable Register

1

Default = 0x00

on Vcc POR

SMI Enable Register

2

Default = 0x00

on Vcc POR

REG INDEX

0xB4 R/W

0xB5 R/W

DEFINITION

This register is used to enable the different interrupt sources

onto the group nSMI output.

1=Enable

0=Disable

Bit[0] Reserved

Bit[1] EN_PINT

Bit[2] EN_U2INT

Bit[3] EN_U1INT

Bit[4] EN_FINT

Bit[5] Reserved

Bit[6] Reserved

Bit[7] EN_WDT

This register is used to enable the different interrupt sources

onto the group nSMI output, and the group nSMI output

onto the nSMI GPI/O pin.

Unless otherwise noted,

1=Enable

0=Disable

STATE

C

C

Bit[0] EN_MINT

Bit[1] EN_KINT

Bit[2] EN_IRINT

Bit[3] Reserved

Bit[4] EN_P12: Enable 8042 P1.2 to route internally to

nSMI. 0=Do not route to nSMI, 1=Enable routing to nSMI.

Bit[5] Reserved

Bit[6] EN_SMI_S: Enables nSMI Interrupt onto Serial IRQ.

Bit[7] EN_SMI_P: Enables nSMI Interrupt onto Parallel

Interrupt Pin IRQ10. 0=SMI pin floats, 1=Output onto nSMI

GPI/O pin.

SMSC FDC37C672

Page 137

DATASHEET

Rev. 10-29-03

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