P89LPC9301(2009) View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

P89LPC9301
(Rev.:2009)

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable flash

NXP Semiconductors. 

NXP Semiconductors

P89LPC9301/931A1

8-bit microcontroller with accelerated two-clock 80C51 core

7.17.1 Brownout detection

The brownout detect function determines if the power supply voltage drops below a

certain level. Enhanced brownout detection has 3 independent functions: BOD reset,

BOD interrupt and BOD FLASH.

BOD reset is always on except in total Power-down mode. It could not be disabled in

software. BOD interrupt may be enabled or disabled in software. BOD FLASH is always

on, except in Power-down modes and could not be disabled in software.

BOD reset and BOD interrupt, each has four trip voltage levels. BOE1 bit (UCFG1.5) and

BOE0 bit (UCFG1.3) are used as trip point configuration bits of BOD reset. BOICFG1 bit

and BOICFG0 bit in register BODCFG are used as trip point configuration bits of BOD

interrupt. BOD reset voltage should be lower than BOD interrupt trip point. BOD FLASH is

used for flash programming/erase protection and has only 1 trip voltage of 2.4 V. Please

refer to P89LPC9301/931A1 User manual for detail configurations.

If brownout detection is enabled the brownout condition occurs when VDD falls below the

brownout trip voltage and is negated when VDD rises above the brownout trip voltage.

For correct activation of brownout detect, the VDD rise and fall times must be observed.

Please see Table 10 “Static characteristics” for specifications.

7.17.2 Power-on detection

The Power-on detect has a function similar to the brownout detect, but is designed to work

as power comes up initially, before the power supply voltage reaches a level where

brownout detect can work. The POF flag in the RSTSRC register is set to indicate an

initial power-up condition. The POF flag will remain set until cleared by software.

7.18 Power reduction modes

The P89LPC9301/931A1 supports three different power reduction modes. These modes

are Idle mode, Power-down mode, and total Power-down mode.

7.18.1 Idle mode

Idle mode leaves peripherals running in order to allow them to activate the processor

when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle

mode.

7.18.2 Power-down mode

The Power-down mode stops the oscillator in order to minimize power consumption. The

P89LPC9301/931A1 exits Power-down mode via any reset, or certain interrupts. In

Power-down mode, the power supply voltage may be reduced to the data retention supply

voltage VDDR. This retains the RAM contents at the point where Power-down mode was

entered. SFR contents are not guaranteed after VDD has been lowered to VDDR, therefore

it is highly recommended to wake-up the processor via reset in this case. VDD must be

raised to within the operating range before the Power-down mode is exited.

P89LPC9301_931A1_1

Preliminary data sheet

Some chip functions continue to operate and draw power during Power-down mode,

increasing the total power used during power-down. These include: Brownout detect,

watchdog timer, comparators (note that comparators can be powered down separately),

and RTC/system timer. The internal RC oscillator is disabled unless both the RC oscillator

has been selected as the system clock and the RTC is enabled.

Rev. 01 — 9 April 2009

© NXP B.V. 2009. All rights reserved.

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