STA323WQS13TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA323WQS13TR

2.1-channel high-efficiency digital audio system with QSound QHD®

STMicroelectronics 

Register descriptions

STA323WQS

7.1.3

7.1.4

7.1.5

Thermal warning recovery bypass

Table 18. Thermal warning recovery bypass

Bit R/W RST

Name

Description

5

RW

1

TWRB

0: Thermal warning Recovery enabled

1: Thermal warning Recovery disabled

If the thermal warning adjustment is enabled (TWAB = 0), then the thermal warning

recovery determines if the adjustment is removed when thermal warning is negative. If

TWRB = 0 and TWAB = 0, then, when a thermal warning disappears, the gain adjustment

determined by the thermal warning post-scale (default = -3 dB) is removed and the gain is

applied to the system. If TWRB = 1 and TWAB = 0, then when a thermal warning

disappears, the thermal warning post-scale gain adjustment remains until TWRB is changed

to zero or the device is reset.

Thermal warning adjustment bypass

Table 19. Thermal warning adjustment bypass

Bit R/W RST

Name

Description

6

RW

1

TWAB

0: thermal warning adjustment enabled

1: thermal warning adjustment disabled

The STA323WQS on-chip power output block provides feedback to the digital controller by

the power control block inputs. The TWARN input is used to indicate a thermal warning

condition. When TWARN is active (set to 0 for a period greater than 400 ms) the power

control block forces an adjustment to the modulation limit in an attempt to eliminate the

thermal warning condition. Once the thermal warning volume adjustment is applied,

whether the gain is reapplied when TWARN is inactive, depends on the TWRB bit.

Fault detect recovery bypass

Table 20. Fault detect recovery bypass

Bit R/W RST

Name

Description

7

RW

0

FDRB

0: fault detector recovery enabled

1: fault detector recovery disabled

The DDX power block provides feedback to the digital controller using inputs to the power

control block. The FAULT input is used to indicate a fault condition (either over-current or

thermal). When FAULT is active (set to 0), the power control block attempts a recovery from

the fault by activating the 3-state output (setting it to 0 which directs the power output block

to begin recovery). It holds it at 0 for period of time in the range of 0.1 ms to 1 second as

defined by the Fault-Detect Recovery Constant register (FDRC registers 29-2Ah), then

toggles it back to 1. This sequence is repeated as long as the fault indication exists. This

feature is enabled by default but can be bypassed by setting the FDRB control bit to 1.

40/78

Share Link: