ST92F250CV2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F250CV2

8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.0B and J1850 BLPD

STMicroelectronics 

ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2Single voltage Flash and E3™ (emulated

FLASH & E3 TM STATUS REGISTER 1 (FESR1)

Address: 224003h /221003h-Read Only

Reset value: 0000 0000 (00h)

7

6

5

4

3

2

1

0

ERER

PGER

SWER

Bit 7 = ERER. Erase error (Read Only).

This bit is set by hardware when an Erase error occurs during a Flash or an E3 TM write

operation. This error is due to a real failure of a Flash cell, that can no longer be erased.

This kind of error is fatal and the sector where it occurred must be discarded. This bit is

automatically cleared when bit FEERR of the FESR0 register is cleared by software.

0: Erase OK

1: Erase error

Bit 6 = PGER. Program error (Read Only).

This bit is automatically set when a Program error occurs during a Flash or an E3 TM write

operation. This error is due to a real failure of a Flash cell, that can no longer be

programmed. The byte where this error occurred must be discarded (if it was in the E3 TM

memory, the byte must be reprogrammed to FFh and then discarded, to avoid the error

occurring again when that byte is internally moved). This bit is automatically cleared when

bit FEERR of the FESR0 register is cleared by software.

0: Program OK

1: Flash or E3 TM Programming error

Bit 5 = SWER. Swap or 1 over 0 Error (Read Only).

This bit has two different meanings, depending on whether the current write operation is to

Flash or E3 TM memory.

In Flash memory this bit is automatically set when trying to program at 1 bits previously set

at 0 (this does not happen when programming the Protection bits). This error is not due to a

failure of the Flash cell, but only flags that the desired data has not been written.

In the E3 TM memory this bit is automatically set when a Program error occurs during the

swapping of the unselected pages to the new sector when the old sector is full (see AN1152

for more details).

This error is due to a real failure of a Flash cell, that can no longer be programmed. When

this error is detected, the embedded algorithm automatically exits the Page Update

operation at the end of the Swap phase, without performing the Erase Phase 0 on the full

sector. In this way the old data are kept, and through predefined routines in TestFlash (Find

Wrong Pages = 230029h and Find Wrong Bytes = 23002Ch), the user can compare the old

and the new data to find where the error occurred.

Once the error has been discovered the user must take to end the stopped Erase Phase 0

on the old sector (through another predefined routine in TestFlash: Complete Swap =

23002Fh). The byte where the error occurred must be reprogrammed to FFh and then

discarded, to avoid the error occurring again when that byte is internally moved.

Doc ID 8848 Rev 7

85/523

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