ST92F250CV2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F250CV2

8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.0B and J1850 BLPD

STMicroelectronics 

Single voltage Flash and E3™ (emulated EEPROM)

Note:

operation and writing 1 into these bits. To restore the protection, reset the micro or execute

another Set Protection operation on this bit.

0: FLASH Sectors 2-0 write protection on

1: FLASH Sectors 2-0 write protection off

A read access to the NVWPR register restores any protection previously enabled.

7.5.2

Note:

NON VOLATILE PASSWORD (NVPWD1-0)

Address: 231FFF-231FFEh - Write Only

Delivery value: 1111 1111 (FFh)

7

PWD7

6

PWD6

5

PWD5

4

PWD4

3

PWD3

2

PWD2

1

PWD1

0

PWD0

Bit 7:0 = PWD[7:0]: Password bits 7:0 (Write Only).

These bits must be programmed with the Non Volatile Password that must be provided with

the Set Protection operation to disable (first write access) or to reenable (second write

access) the test and EPB modes. The first write access fixes the password value and resets

the TMDIS bit of NVWPR (231FFDh). The second write access, with Program Data

matching with NVPWD[1:0] content, resets the PWOK bit of NVWPR.

These two registers can be accessed only in write mode (a read access returns FFh).

Temporary unprotection

On user request the memory can be configured so as to allow the temporary unprotection

also of all access protections bits of NVAPR (write protection bits of NVWPR are always

temporarily unprotectable).

Bit APEX can be temporarily disabled by executing the Set Protection operation and writing

1 into this bit, but only if this write instruction is executed from an internal memory (Flash

and Test Flash excluded).

Bit APEE can be temporarily disabled by executing the Set Protection operation and writing

1 into this bit, but only if this write instruction is executed from the memory itself to unprotect

(E3 TM).

Bits APRO and APBR can be temporarily disabled through a direct write at NVAPR location,

by overwriting at 1 these bits, but only if this write instruction is executed from the memory

itself to unprotect.

To restore the access protections, reset the micro or execute another Set Protection

operation by writing 0 to the desired bits.

To restore all the protections previously enabled in the NVAPR or NVWPR register, read the

corresponding register.

When an internal memory (Flash, TestFlash or E3 TM) is protected in access, also the data

access through a DMA of a peripheral is forbidden (it returns FFh). To read data in DMA

mode from a protected memory, first it is necessary to temporarily unprotect that memory.

The temporary unprotection allows also to update a protected code.

Refer to the following figures to manage the Test/EPB, Access and Write protection modes.

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Doc ID 8848 Rev 7

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