FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

3.1.2.8

3.1.2.9

3.1.2.10

3.1.2.11

3.1.3

Table 3.

CDR Lock Times (Continued)

± 25

684

± 50

734

± 100

860

Receiver Common Mode Voltage

Receiver common mode voltage is fixed internally and set to 0.7V.

Receiver Signal Threshold

A signal detect circuit in each port indicates when the received signal

strength at any one of its four inputs (for quad SerDes ports) or at its

only input (for single SerDes ports) falls below the VLOS level indicated

in Table 26. When this occurs, the Signal Detect bit in the

SERDES_STATUS register (Table 138) is asserted. The Signal Detect bit

is not de-asserted until a configurable number of above-threshold

signal cycles is reached (Table 136).

Loopback

A per-port Tx-to-Rx loopback mode is provided that, for each SerDes,

loops back data from the output of the serializer to the input of its

deserializer/clock recovery circuitry (see Table 137).

Note that although signal detect is actually achieved, Signal Detect in

the SERDES_STATUS register (Table 138) is not raised. Frames

received in loopback mode are considered as RxSymbolErrors (Group 1

Counters), but this may be ignored by setting the PHY Error Discard bit

in MAC_CFG_2 (Table 156).

Lane Reversal

XAUI lane reversal is supported (See Table 145 PCS_CFG_1[RI and TI])

on all ports. IEEE 802.3 specifies XAUI lanes as 0:3 and they are also

referred to in this way in this datasheet when referring to them at the

PCS layer or higher. Since lane ordering can be reversed at the serdes

inputs/outputs, lanes are referred to as A:D at the serdes I/O.

Without setting lane reversal bits, the correspondence between these

two designations is 0:3 corresponds to A:D and when lane reversal bits

are set, the correspondence is 0:3 to D:A.

SerDes - Testing with BIST

{Register described in Table 137, Table 143 and Table 144.}

The FM2112 supports field operation of the BIST (Built-In Self Test).

23

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